The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. However, these advances have increased the complexity of processing and manufacturing ICs. For example, the reliability and functional challenges of ultrathin gate oxides are becoming increasingly greater for increasingly small IC devices. Hence, reduction in interface defect density (Dit) at the substrate/oxide interface to increase carrier mobility and reduce current leakage, and reduction in capacitive effective thickness (Cet) to increase scale, in current IC fabrication processes is highly desirable.
Therefore, while existing methods of fabricating semiconductor devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.